FIG. 37 is a block diagram of an example of a conventional TFT liquid crystal display representing liquid crystal displays of an active matrix method. Numeral 3801 denotes a TFT liquid crystal panel, numeral 3802 denotes a source driver IC having a plurality of source drivers, numeral 3803 denotes a gate driver IC having a plurality of gate drivers, numeral 3804 denotes a controller, and numeral 3805 denotes a liquid crystal driving power source (power source circuit).
The controller 3804 sends a vertical synchronizing signal to the gate driver IC 3803, and a horizontal synchronizing signal to both the source driver IC 3802 and gate driver IC 3803. Display data inputted from the outside are entered into the source driver IC 3802 through the controller 3804 in the form of a digital signal. The source driver IC 3802 latches the input display data in a time-sharing method. Then, the source driver IC 3802 converts the digital signal to an analog signal in sync with the horizontal synchronizing signal from the controller 3804 and outputs the analog voltage from a liquid crystal driving output terminal to be used for gradation display.
FIG. 38 shows an arrangement of the TFT liquid crystal panel. Numeral 3901 denotes a pixel electrode, numeral 3902 denotes a pixel capacitance, numeral 3903 denotes a TFT (switching element), numeral 3904 denotes a source signal line, numeral 3905 denotes a gate signal line, and numeral 3906 denotes a counter electrode.
The source signal line 3904 is supplied with a gradation display voltage from the source driver IC 3802, which varies in response to brightness of a display pixel. The gate signal line 3905 is supplied with a scanning signal from the gate driver IC 3803, whereby vertically aligned TFTs 3903 are successively turned ON. Through the TFT 3903 which stays ON, a voltage supplied to the source signal line 294 is applied to the pixel electrode 3901 connected to the drain of that particular TFT 3903. The applied voltage is accumulated in the pixel capacitance 3902 between the TFT 3903 and counter electrode 3906, in response to which light transmittance of the liquid crystal varies. Accordingly, display in accordance with the variance of the light transmittance is shown.
Examples of a liquid crystal driving waveform are shown in FIGS. 39 and 40. Numerals 4001 and 4101 represent driving waveforms of the source driver, numerals 4002 and 4102 represent driving waveforms of the source driver, and numerals 4003 and 4103 indicate potentials of the counter electrode, and numerals 4004 and 4104 represent voltage waveforms of the pixel electrode.
A voltage applied to the liquid crystal material is a potential difference between the pixel electrode 3901 and counter electrode 3906, which is indicated as a shaded portion in the drawings. The liquid crystal panel has to be driven by an alternating voltage to ensure long-term reliability. FIG. 39 shows a case where the TFT 3903 is turned ON by an output from the gate driver when an output voltage of the source driver is higher than a voltage of the counter electrode. Thus, a positive voltage with respect to the counter electrode 3906 is applied to the pixel electrode 3901.
FIG. 41 shows an example of a polarity alignment on the liquid crystal panel 3801 to obtain an alternating driving voltage. This example is based on so-called dot-inverting driving, and positive polarities and negative polarities are aligned vertically and horizontally in an alternating sequence on one screen (frame), and each polarity is inverted per frame. According to this method, in the source driver IC 3802, when odd-numbered output terminals output positive voltages, even-numbered output terminals output negative voltages. Conversely, when the odd-numbered output terminals output negative voltages, even-numbered output terminals output positive voltages.
FIG. 42 shows an example driving waveform of the source driver by dot-inverting driving. In the drawing, numeral 4301 represents an output voltage waveform of the odd-numbered output terminals, numeral 4302 represents an output voltage waveform of the even-numbered output terminal, and numeral 4303 represents a voltage of the counter electrode 3906. As shown in the drawing, the odd-numbered output terminal and even-numbered terminal constantly output voltages of opposite polarities with respect to the counter electrode 3906.
FIG. 43 shows a block diagram of an example arrangement of the source driver IC 3802. The display data (R,G,B) inputted in the form of a digital signal is time-shared based on an operation of a shift register 4403, stored into a sampling memory 4404, and transferred collectively to a hold memory 4405 at the timing of a horizontal synchronizing signal. The shift register 4403 is designed to operate based on a start pulse and a clock (CK). The data in the hold memory 4405 are converted to an analog voltage by a digital-to-analog converter (DAC) 4407 through a level shifter 4406, and outputted as a gray scale display driving voltage (liquid crystal driving voltage) from an output circuit 4408 through a liquid crystal driving output terminal.
FIGS. 44(a) and 44(b) show a block diagram and an operation of an example output circuit of a source driver IC which carries out dot-inverting driving in accordance with a prior art (first prior art). In these drawings, blocks denoted by numerals 4405, 4407 and 4408 in FIG. 43 are illustrated as 2-output terminal circuits.
In these drawings, numeral 4501 denotes a voltage follower which is an output circuit employing an operational amplifier to drive the odd-numbered output terminal, numeral 4502 denotes a voltage follower which is an output circuit employing an operational amplifier identical with the one used for the output circuit 4501 to drive the even-numbered output terminal, numerals 4503, 4504, 4505, and 4506 denote output alternating switches which switch the polarity of the output voltage of a liquid crystal driving output, numeral 4507 denotes a digital-to-analog converter which converts a digital signal of a positive voltage to an analog signal, numeral 4508 denotes another digital-to-analog converter which converts a digital signal of a negative voltage to an analog signal, numerals 4509 and 4510 denote hold memories which withhold display data, numeral 4511 denotes an odd-numbered output terminal, and numeral 4512 denotes an even-numbered output terminal. Numeral 4513 in the operational amplifier 4501 and numeral 4514 in the operational amplifier 4502 denote operational amplifiers with N-channel MOS inputs, and numeral 4515 in the operational amplifier 4501 and numeral 4516 in the operational amplifier 4502 denote operational amplifiers with P-channel MOS inputs.
The following will explain a method of alternating the liquid crystal driving waveforms by the above-arranged circuits.
When the output alternating switches 4503 through 4506 are in the state shown in FIG. 44(a), the display data for the odd-numbered output terminal 4511 stored in the hold memory 4509 are inputted to the positive digital-to-analog converter 4507. The resulting analog voltage is outputted to the liquid crystal panel 3801 from the odd-numbered output terminal 4511 through the voltage follower 4501. The output voltage thus obtained is used as a positive liquid crystal driving voltage.
In contrast, when the output alternating switches 4503 through 4506 are in the state shown in FIG. 44(b), the display data for the odd-numbered output terminal 4511 stored in the hold memory 4509 are inputted to the negative digital-to-analog converter 4508. The resulting analog voltage is outputted to the liquid crystal panel 3801 from the odd-numbered output terminal 4511 through the voltage follower 4501. The output voltage thus obtained is used as a negative liquid crystal driving voltage.
A polarity of the driving voltage of the even-numbered output terminal 4512 is opposite to that of the odd-numbered output terminal 4511. More specifically, when the output alternating switches 4503 through 4506 are in the state shown in FIG. 44(a), the display data for the even-numbered output terminal 4512 stored in the hold memory 4510 are inputted into the negative digital-to-analog converter 4508, and the resulting analog voltage is outputted to the liquid crystal panel 3801 from the even-numbered output terminal 4512 through the voltage follower 4502. The output voltage thus obtained is used as a negative liquid crystal driving voltage.
In contrast, when the output alternating switches 4503 through 4506 are in the state shown in FIG. 44(b), the display data for the even-numbered output terminal 4512 stored in the hold memory 4510 are inputted into the positive digital-to-analog converter 4507, and the resulting analog voltage is outputted to the liquid crystal panel 3801 from the even-numbered output terminal 4512 through the voltage follower 4502. The output voltage thus obtained is used as a positive liquid crystal driving voltage. Of all these actions, FIGS. 44(a) and 44(b) show the flow of a signal for the odd-numbered output terminal. By switching the state of FIG. 44(a) to the state of FIG. 44(b) and vice versa alternately per frame using the output alternating switches 4503 through 4506, a driving waveform necessary to drive the liquid crystal panel 3801 is converted to an alternating waveform.
In the circuit diagram shown in FIGS. 44(a) and 44(b), one output terminal is constantly driven by the same operational amplifier whether an output voltage is positive or negative. Generally, as one of the essential requirements, the output terminal of the liquid crystal driving circuit must have an output dynamic range for a full range of an operating power source voltage. Assume that the above-arranged circuits are incorporated in an enhancement mode MOS transistor employed in a general LSI. Then, to eliminate an operation disable area caused by a threshold voltage, the output circuit 4501 must have two operational amplifier 4513 with the N-channel MOS input and the operational amplifier 4515 with the P-channel MOS input. Thus, the circuit is upsized undesirably, thereby increasing a chip size of the LSI incorporating the same. Further, having two operational amplifiers for each output increases power consumption.
FIGS. 45(a) and 45(b) show a block diagram and an operation of an example output circuit of a source driver IC which carries out dot-inverting driving in accordance with another prior art (second prior art). In these drawings, blocks denoted by numerals 4405, 4407 and 4408 in FIG. 43 are illustrated as 2-output terminal circuits.
In these drawings, numeral 4601 denotes a voltage follower employing an operational amplifier with an N-channel MOS transistor input, numeral 4602 denotes a voltage follower employing an operational amplifier with a P-channel MOS transistor input, numerals 4603, 4604, 4605, and 4606 denote output alternating switches which switch a polarity of the output voltage of a liquid crystal driving output, numeral 4607 denotes a digital-to-analog converter which converts a digital signal of a positive voltage to an analog signal, numeral 4608 denotes another digital-to-analog converter which converts a digital signal of a negative voltage to an analog signal, numerals 4609 and 4610 denote hold memories for withholding display data, numeral 4611 denotes an odd-numbered output terminal, and numeral 4612 denotes an even-numbered output terminal.
The output voltage of FIGS. 45(a) and 45(b) is converted t o an alternating voltage by the output alternating switches 4603 through 4606 in the same manner as the case in FIGS. 44(a) and 44(b) except for the following point. That is, an output from the positive digital-to-analog converter 4607 is sent directly to the operational amplifier 4601 with the N-channel MOS transistor input, while an output from the negative digital-to-analog converter 4608 is sent directly to the operational amplifier 4602 with the P-channel MOS transistor input, so that an output from each operational amplifier is sent to a desired output terminal through the switches 4603 and 4604.
Since the positive digital-to-analog converter 4607 outputs the half or more of the operating power source voltage, a circuit with an N-channel input circuit alone is used satisfactorily as the operational amplifier. Likewise, since the negative digital-to-analog converter 4608 outputs not more than half the operating power source voltage, a circuit with a P-channel input alone is used satisfactorily as the operational amplifier. According to the arrangement shown in FIGS. 45(a) and 45(b), the number of the operational amplifiers for each output terminal can be reduced to half compared with the arrangement shown in FIGS. 44(a) and 44(b), thereby making it possible to downsize the chip and save power consumption.
However, according to the arrangement shown in FIGS. 45(a) and 45(b), different operational amplifiers are used to drive an output of different polarities. To be more specific, the liquid crystal driving output terminal of FIGS. 45(a) and 45(b) is driven by the operational amplifier 4601 when it outputs a positive voltage (see FIG. 45(a)), while the same is driven by the operational amplifier 4602 when it outputs a negative voltage (see FIG. 45(b)). So, the following will explain a case where the operational amplifiers 4601 and 4602 have an incidental offset voltage caused by discrepancies in material and workmanship and the like.
FIG. 46 shows a liquid crystal driving voltage waveform in a case where the operational amplifier 4601 has an incidental offset voltage A and the operational amplifier 4602 has an incidental offset voltage B. As can be seen in the drawing, a deviation of the positive output voltage and a deviation of the negative output voltage from an expected value voltage are different. Thus, a component equal to a difference between two deviations (=(A-B)/2) remains as an error voltage in an average voltage of the driving voltages applied to the liquid crystal display pixel. The error voltage occurs incidentally for each driving output terminal, and results in a difference in applied voltages among the pixels of the liquid crystal display, thereby causing irregularities on display.
For purposes of comparison, a liquid crystal driving voltage waveform shaped by the arrangement shown in FIGS. 44(a) and 44(b) is illustrated in FIG. 47. According to the arrangement shown in FIGS. 44(a) and 44(b), each of the positive voltage and negative voltage is driven by a single output circuit, and for this reason, a deviation from the expected value voltage is the same. The deviations in the form of positive and negative voltages applied to the pixel are oriented to directions such that cancel out each other. Thus, according to the arrangement shown in FIGS. 44(a) and 44(b), differences in deviations among the liquid crystal driving output terminals average on the display pixel, thereby causing no problem for display.
According to the first prior art shown in FIGS. 44(a) and 44(b), an output terminal is constantly driven by the same operational amplifier whether the output voltage is positive or negative. Generally, as one of the essential requirements, the output terminal of the liquid crystal driving circuit must have an output dynamic range for a full range of an operating power source voltage.
However, in case that the first prior art is adopted for an enhancement mode MOS transistor used for a typical LSI, as shown in FIGS. 44(a) and 44(b), in order to eliminate an operation disable area caused by a threshold voltage, one output circuit 4501 must include two operational amplifiers: the operational amplifier 4513 with the N-channel MOS input and the operational amplifier 4515 with the P-channel MOS input. As a result, the circuit is undesirably upsized, and when it is fabricated into an LSI, the chip is upsized accordingly. Further, since the two operational amplifiers are necessary for each output circuit, there arises a problem that the circuit consumes more power.
In contrast, according to the second prior art, different operational amplifiers are used to drive the positive voltage and negative voltage. Thus, if the operational amplifiers have an incidental offset voltage caused by discrepancies in material and workmanship, deviations from the expected value voltage differ between the positive voltage and negative voltage. Hence, a component equal to a difference between two deviations remains as an error voltage in an average voltage of the driving voltages which will be applied to the liquid crystal display pixel. Since the error voltage occurs incidentally for each driving output terminal, it results in a difference in applied voltages between the pixels, thereby causing irregularities on display.